Please check Spartan-6 FPGA DSP48A1 Slice User Guide for details on DSP48A1 operations. By the way, download Xilinx Document Navigator to manage all Xilinx documents.
Showing posts with label dsp. Show all posts
Showing posts with label dsp. Show all posts
Wednesday, November 30, 2011
Spartan6 DSP48 View
Spartan6 DSP48 View (see the first snapshot below. Click on it for full resolution) in ADEPT can be displayed after an NCD is read with "Get DSP48 attributes" checked (see the second
snapshot below). The DSP48 view displays all DSP48 instances in the
design with their placements, major attributes and decoded functions. If OPMODE inputs are not connected to constant 1's or 0's, their
values will have "?" in them. If OPMODE can't be decoded, the
corresponding decoding columns will be blank.
Thursday, December 10, 2009
Virtex6 DSP48 View
Compared to the Virtex5 DSP48 View in ADEPT, the Virtex6 DSP48 View has 5 new columns (circled in the snapshot below) for the new pre-adder in DSP48E1 slice. The INMODE4, INMODE3:0 and USE_DPORT columns display the actual values for the INMODE input and USE_DPORT attribute. The MULT_A and MULT_B columns display inputs to the multiplier A and B ports based on the decoding of INMODE and USE_DPORT.
Please check Virtex-6 FPGA DSP48E1 Slice User Guide for details on DSP48E1 operations. By the way, download Xilinx Document Navigator to manage all Xilinx documents.
Saturday, November 21, 2009
DSP48 View - Virtex5
ADEPT v0.38.6 added a new "View->DSP48 View" function for Virtex5. After an NCD is read with "Get DSP48 attributes" checked (see the snapshot at the end), the DSP48 view displays all DSP48 instances in the design with their placements (Comp Name column), OPMODE and ALUMODE values (OPMODE and ALUMODE columns) and their decodings (X, Y, Z and ALU OP columns), and pipeline register attributes (A/B/C/M/PREG columns). If OPMODE or ALUMODE are not connected to constant 1's or 0's, their values will have "?" in them. If OPMODE or ALUMODE can't be decoded, the corresponding decoding columns will be blank.

Please check Virtex-5 FPGA XtremeDSP Design Considerations User Guide for details on DSP48E operations. By the way, download Xilinx Document Navigator to manage all Xilinx documents.
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