Some high speed interfaces (DDR3 memory interface for example) require skew of signals in the interface well matched. One of the factors affecting the skew is the flight time from the IO pad on the die to the package pin.
AR15321 provides a simple method of multiplying the package trace length by 6.0ps/mm(best case) or 7.1ps/mm(worst case) to calculate the flight time. This is the formula that ADEPT has been using for a long time. A new AR (
AR34174) was published recently with instructions on how to use the inductance and capacitance matrix in IBIS model to get more precise flight time.
ADEPT v0.42.1 incorporated the new method to calculate the flight time for all Virtex6 devices/packages. Below are instructions on how to use the new method:
- Unzip the IBIS Models zip file and you will see lots of .pkg files for different package/device combinations
- Run ADEPT and load a Virtex6 device/package
- Run "File->Read IBIS Model" to load the IBIS model .pkg file for the loaded device
- Once the IBIS model is read in, the "Trace Len" column is now displayed as "Flight Time LC" column to indicate that the flight time (ps) is calculated with the inductance(L) and capacitance(C) data extracted from the IBIS model
