New Columns on 7 Series Pin Table View

The 7 series Pin Table View in ADEPT has several new columns displaying new features only available in 7 series FPGAs:

• SLR: Super Logic Region number for SSI (Stacked Silicon Interconnect) devices.
• ByteGrp: memory byte group number. e.g. for DDR3 interface, DQS and associated DQ pins need to be placed in the same byte group.
• Min/Max Dly ps: minimum/maximum flight time in pico second. These numbers directly come from the device package file and correlate well with calculations using IBIS models.